On 3/8/24 17:18, Théo Lebrun wrote: > Add SPI-NOR octal flash node to evaluation board devicetree. > > Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx> > --- > arch/mips/boot/dts/mobileye/eyeq5-epm5.dts | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts > index 6898b2d8267d..0e5fee7b680c 100644 > --- a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts > +++ b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts > @@ -21,3 +21,18 @@ memory@0 { > <0x8 0x02000000 0x0 0x7E000000>; > }; > }; > + > +&ospi { > + flash0: flash@0 { > + compatible = "jedec,spi-nor"; > + reg = <0>; /* chip select */ > + > + spi-max-frequency = <40000000>; > + spi-rx-bus-width = <8>; > + cdns,read-delay = <1>; > + cdns,tshsl-ns = <400>; > + cdns,tsd2d-ns = <400>; > + cdns,tchsh-ns = <125>; > + cdns,tslch-ns = <50>; These cdns properties look bad, they bypass SPI NOR entirely. I'd check if these timings can be determined at SFDP parsing time, then I'd pass them to the SPI controller. I see these properties are already accepted in the bindings file for few years now. Something to improve later on.