[PATCH 00/11] spi: cadence-qspi: add Mobileye EyeQ5 support

[Théo Lebrun <theo.lebrun@xxxxxxxxxxx>]

Hi all,

This series adds support for the embedded Cadence Quad SPI controller on
Mobileye EyeQ5. In our case "quad" is inappropriate as we support
octal. Most patches aim to improve performance and avoid interrupts.
Stuff to talk about:

 - Both IRQ handler and read operation callbacks called
   of_device_get_match_data(). This has a cost which we avoid.

 - Add a flag to detect FIFO depth at runtime. The SRAMPARTITION
   register is partially read-only: writel() then readl() to get the
   depth.

   This implies cdns,fifo-depth devicetree property is unused on this
   platform.

 - Add a flag to avoid IRQs for indirect reads. Hardware is way too fast
   for sleeping to make sense.

 - Add a flag to busywait in read operations. We avoid many hrtimer
   interrupts this way. Fallback to sleeping, which shouldn't happen.

 - End this by adding the compatible to the driver, add the controller
   to the SoC devicetree and add an octal flash to the eval board
   devicetree.

Dependencies:
 - Devicetree:
    - Patches [0][1] adding platform DTS, found in mips-next [2].
    - System-controller series [3] for <&clocks> phandle.
 - Driver: patches that fix this driver's runtime PM, see spi-next [4].

Have a nice day,
Théo

[0]: https://lore.kernel.org/lkml/20240216174227.409400-1-gregory.clement@xxxxxxxxxxx/
[1]: https://lore.kernel.org/linux-mips/20240209-regname-v1-0-2125efa016ef@xxxxxxxxxxx/
[2]: https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/log/
[3]: https://lore.kernel.org/lkml/20240301-mbly-clk-v9-0-cbf06eb88708@xxxxxxxxxxx/
[4]: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git/log/

Signed-off-by: Théo Lebrun <theo.lebrun@xxxxxxxxxxx>
---
Théo Lebrun (11):
      dt-bindings: qspi: cdns,qspi-nor: add mobileye,eyeq5-ospi compatible
      spi: cadence-qspi: switch from legacy names to modern ones
      spi: cadence-qspi: allow building for MIPS
      spi: cadence-qspi: store device data pointer in private struct
      spi: cadence-qspi: add FIFO depth detection quirk
      spi: cadence-qspi: minimise register accesses on each op if !DTR
      spi: cadence-qspi: add no-IRQ mode to indirect reads
      spi: cadence-qspi: add early busywait to cqspi_wait_for_bit()
      spi: cadence-qspi: add mobileye,eyeq5-ospi compatible
      MIPS: mobileye: eyeq5: Add SPI-NOR controller node
      MIPS: mobileye: eyeq5: add octal flash node to eval board DTS

 .../devicetree/bindings/spi/cdns,qspi-nor.yaml     |  13 ++-
 arch/mips/boot/dts/mobileye/eyeq5-epm5.dts         |  15 +++
 arch/mips/boot/dts/mobileye/eyeq5.dtsi             |  15 +++
 drivers/spi/Kconfig                                |   2 +-
 drivers/spi/spi-cadence-quadspi.c                  | 116 +++++++++++++++------
 5 files changed, 130 insertions(+), 31 deletions(-)
---
base-commit: ecd5ff483c763ca368f815fafc954f6db9788143
change-id: 20240209-cdns-qspi-mbly-de2205a44ab3

Best regards,
-- 
Théo Lebrun <theo.lebrun@xxxxxxxxxxx>