Maybeit will already drive IO3 high by default?! (and esp. what the bootROM is doingif that SoC is able to load the first stage bootloader from NOR).
I just had another look at your Renesas SoC and indeed, the register default is to set IO3 high if not used. Mh. I still think 3,3,3,3 is the saner default. But I might be wrong. Hard to tell, as the sample size is just Micron and Atmel for now. And it's still unclear to me why the Atmel isn't working with 3,3,3,1.
-michael