On Fri, Nov 03, 2023 at 09:29:12AM -0400, Ben Wolsieffer wrote: > Hi Conor, > > On Fri, Nov 03, 2023 at 12:50:53PM +0000, Conor Dooley wrote: > > On Thu, Nov 02, 2023 at 03:37:20PM -0400, Ben Wolsieffer wrote: > > A wider range of supported word sizes and some additional buffers, > > implies that the F4 could be used as a fallback compatible. Does the > > register map change incompatibly in the process of widening the FIFOs or > > something like that? > > Yes, the F4 has a single bit to select 8 or 16 bit word size, while the > F7 uses four bits to select an arbitrary word size from 4 to 16 bits. > This series supports the packing mode, to allow sending two <=8 bit > words with a single write to the FIFO, but even if we didn't want to > support this feature, the F7 would require setting the FRXTH bit (not > present in the F4) when using <=8 bit word sizes. Oke. Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> Cheers, Conor.
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