Hi,
On Wed, Jun 28, 2023 at 02:54:06PM +0200, Stefan Moring wrote:
> IMX51 supports 4096 bit burst lengths. Using the spi transfer length
> instead of bits_per_word increases performance significantly.
>
> Signed-off-by: Stefan Moring <stefan.moring@xxxxxxxxxxxxxxx>
> ---
I have an i.MX6ULL system with "inanbo,t28cp45tn89-v17" panel, which
breaks due to this change. Reverting this patch results in working
panel. Note, that the panel driver [0] does 'spi->bits_per_word = 9;'.
[0] drivers/gpu/drm/panel/panel-sitronix-st7789v.c
-- Sebastian
> drivers/spi/spi-imx.c | 11 ++++++++---
> 1 file changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
> index 34e5f81ec431..cbd306c25d28 100644
> --- a/drivers/spi/spi-imx.c
> +++ b/drivers/spi/spi-imx.c
> @@ -644,9 +644,13 @@ static int mx51_ecspi_prepare_transfer(struct spi_imx_data *spi_imx,
> if (spi_imx->slave_mode && is_imx53_ecspi(spi_imx))
> ctrl |= (spi_imx->slave_burst * 8 - 1)
> << MX51_ECSPI_CTRL_BL_OFFSET;
> - else
> - ctrl |= (spi_imx->bits_per_word - 1)
> - << MX51_ECSPI_CTRL_BL_OFFSET;
> + else {
> + if (spi_imx->count >= 512)
> + ctrl |= 0xFFF << MX51_ECSPI_CTRL_BL_OFFSET;
> + else
> + ctrl |= (spi_imx->count*8 - 1)
> + << MX51_ECSPI_CTRL_BL_OFFSET;
> + }
>
> /* set clock speed */
> ctrl &= ~(0xf << MX51_ECSPI_CTRL_POSTDIV_OFFSET |
> @@ -1243,6 +1247,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
> spi_imx->spi_bus_clk = t->speed_hz;
>
> spi_imx->bits_per_word = t->bits_per_word;
> + spi_imx->count = t->len;
>
> /*
> * Initialize the functions for transfer. To transfer non byte-aligned
> --
> 2.34.1
>
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