On Fri, Jul 14, 2023 at 03:14:59PM +0800, William Qiu wrote: > On 2023/7/13 22:57, Rob Herring wrote: > > I suspect that PCLK and SSPCLK are tied to the same clock source. There > > must be an SSPCLK because that is the one used to clock the SPI bus and > > we need to know the frequency of it. > After communicating with colleagues in SoC FE, I learned that PCLK and > SSPCLK were homologous on JH7110. He said that SSPCLK would divide the > frequency internally anyway, and there was no need for external part frequency, > so he directly gave them together. > So, should I call this clock ssp_apb or keep it SSPCLK? I'd expect this to be handled in the DTS for the SoC - connect both clocks the binding requires to whatever the upstream clock is, it's not clear to me that any binding change is required.
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