RE: [PATCH 0/2] spi: cadence-quadspi: Fix random issues with Xilinx Versal DMA read

["Potthuri, Sai Krishna" <sai.krishna.potthuri@xxxxxxx>]

> -----Original Message-----
> From: Sai Krishna Potthuri <sai.krishna.potthuri@xxxxxxx>
> Sent: Monday, March 20, 2023 3:29 PM
> To: Mark Brown <broonie@xxxxxxxxxx>
> Cc: linux-spi@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; git (AMD-Xilinx)
> <git@xxxxxxx>; saikrishna12468@xxxxxxxxx; Potthuri, Sai Krishna
> <sai.krishna.potthuri@xxxxxxx>
> Subject: [PATCH 0/2] spi: cadence-quadspi: Fix random issues with Xilinx Versal
> DMA read
> 
> Update Xilinx Versal external DMA read logic to fix random issues
> - Instead of having the fixed timeout, update the read timeout based on the
> length of the transfer to avoid timeout for larger data size.
> - While switching between external DMA read and indirect read, disable the SPI
> before configuration and enable it after configuration as recommended by Octal-
> SPI Flash Controller specification.
> 
> Sai Krishna Potthuri (2):
>   spi: cadence-quadspi: Update the read timeout based on the length
>   spi: cadence-quadspi: Disable the SPI before reconfiguring
> 
>  drivers/spi/spi-cadence-quadspi.c | 40 ++++++++++++++++++-------------
>  1 file changed, 24 insertions(+), 16 deletions(-)
> 
> --
Mark: Do you have any comments on this series?

Regards
Sai Krishna