Update Xilinx Versal external DMA read logic to fix random issues - Instead of having the fixed timeout, update the read timeout based on the length of the transfer to avoid timeout for larger data size. - While switching between external DMA read and indirect read, disable the SPI before configuration and enable it after configuration as recommended by Octal-SPI Flash Controller specification. Sai Krishna Potthuri (2): spi: cadence-quadspi: Update the read timeout based on the length spi: cadence-quadspi: Disable the SPI before reconfiguring drivers/spi/spi-cadence-quadspi.c | 40 ++++++++++++++++++------------- 1 file changed, 24 insertions(+), 16 deletions(-) -- 2.25.1