Loongson platform support spi hardware controller and this series patch was to add spi driver and binding support. Change in v2: 1. This [PATCH v2 1/2] dt-bindings patch need depend on clk patch: https:// lore.kernel.org/all/20230307115022.12846-1-zhuyinbo@xxxxxxxxxxx/ 2. Remove the clock-names in spi yaml file. 3. Add "loongson,ls7a-spi" compatible in spi yaml file. 4. Add an || COMPILE_TEST and drop && PCI then add some CONFIG_PCI macro to limit some pci code. 5. Make the spi driver top code comment block that use C++ style. 6. Drop spi->max_speed_hz. 7. Add a spin_lock for loongson_spi_setup. 8. Add a timeout and cpu_relax() in loongson_spi_write_read_8bit. 9. Add spi_transfer_one and drop transfer and rework entire spi driver that include some necessary changes. 10. Use module_init replace subsys_initcall. 11. About PM interface that I don't find any issue so I don't add any changes. Change in v3: 1. This [PATCH v3 1/2] dt-bindings patch need depend on clk patch: https:// lore.kernel.org/all/20230323025229.2971-1-zhuyinbo@xxxxxxxxxxx/ 2. Drop the unused blank line in loongson,ls-spi.yaml file. 3. Replace clock minItems with clock maxItems in yaml file. 4. Separate spi driver into platform module, pci module and core module. 5. Replace DIV_ROUND_UP with DIV_ROUND_UP_ULL to fix compile error "undefined reference to `__aeabi_uldivmod'" and "__udivdi3 undefined" that reported by test robot. 6. Remove the spin lock. 7. Clear the loongson_spi->hz and loongson_spi->mode in setup to fixup the issue that multiple spi device transfer that maybe cause spi was be misconfigured. Yinbo Zhu (2): dt-bindings: spi: add loongson spi spi: loongson: add bus driver for the loongson spi controller .../bindings/spi/loongson,ls-spi.yaml | 43 +++ MAINTAINERS | 10 + drivers/spi/Kconfig | 31 ++ drivers/spi/Makefile | 3 + drivers/spi/spi-loongson-core.c | 302 ++++++++++++++++++ drivers/spi/spi-loongson-pci.c | 89 ++++++ drivers/spi/spi-loongson-plat.c | 66 ++++ drivers/spi/spi-loongson.h | 41 +++ 8 files changed, 585 insertions(+) -- 2.20.1