On Thu, Jun 23, 2022 at 11:39:19AM +0000, Mahapatra, Amit Kumar wrote: > > > /* Mode (clock phase/polarity/etc.) */ > > > if (of_property_read_bool(nc, "spi-cpha")) > > This is changing the DT binding but doesn't have any updates to the binding > > document. The binding code also doesn't validate that we don't have too > > many chip selects. > The following updates are done in the binding documents for adding multiple > CS support: > In jedec,spi-nor.yaml file " maxItems " of the "reg" DT property has been > updated to accommodate two CS per SPI device. This is a change to a binding for a specific driver, this is changing the SPI core. > > I'm also not seeing anything here that checks that the driver supports > > multiple chip selects - it seems like something that's going to cause issues > > and we should probably have something to handle that situation. > In my approach the chip select member (chip_select) of the spi_device structure > is changed to an array (chip_select[2]). This array is used to store the CS values > coming from the "reg" DT property. > In case of multiple chip selects spi->chip_slect[0] will hold CS0 value & > spi->chip_select[1] wil hold CS1 value. > In case of single chip select the spi->chip_select[0] will hold the chip select value. That doesn't address the issue, the issue is checking that the driver can support multiple chip selects.
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