Re: spi-pl022 on lpc32xx

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Hi Trevor,

On 3/28/22 22:01, Trevor Woerner wrote:
Hi,

I have a spi-nor chip (m25p16) connected to the SPI1 bus of an LPC32xx-based
machine that I can't get working.

The LPC32xx has both an SPI controller and an SSP controller, but only one can
be active at a time. The SSP is an ARM primecell component which is a "SPI on
steroids" device. The SSP can be run in several modes, one of which is "SPI"
mode.

The LPC32xx machine does not have a SPI driver in the kernel, but it does have
a driver for the SSP controller. Since there is no SPI driver, I'm using the
SSP driver in "SPI" mode, but not having much luck.

I have a feeling that Sylvain Lemieux once reported that the PrimeCell SPI
driver worked for him, but here I might be wrong.

I can see the SPI subsystem sending the 0x9f command (READ ID), the spi-pl022
driver writes the command to the SSP data register, but the flag in the SSP
status register to say data has been received never goes up.

I'm wondering if anyone is successfully using the current spi-pl022 driver to
interact with an SPI device (preferably on a lpc32xx-based machine)?

I've spent the better part of the last week poking at this. I've tried many
combinations of device tree, but what I think should work is:

	&ssp0 {
		status = "okay";
		num-cs = <1>;
		cs-gpios = <&gpio 3 4 1>;

		m25p16@0 {
			compatible = "jedec,spi-nor";
			reg = <0>;
			spi-max-frequency = <500000>;

			pl022,interface = <0>;
			pl022,com-mode = <1>;
		};
	};


FWIW on my board I do use both SSP0 and SSP1 at once, but I didn't rebase
the dts/kernel for a long time, so the examples might be outdated:

&ssp0 {
	num-cs = <1>;
	cs-gpios = <&gpio 3 5 GPIO_ACTIVE_HIGH>; /* SSEL0 */

	sc16is752@0 {
		compatible = "nxp,sc16is752";
		reg = <0>;
		spi-max-frequency = <4000000>;

		/* 18.432 MHz external oscillator */
		clocks = <&xtal_18432k>;

		/* Interrupt to GPI_07 */
		interrupt-parent = <&sic2>;
		interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
	};
};

&ssp1 {
	num-cs = <1>;
	cs-gpios = <&gpio 3 4 GPIO_ACTIVE_HIGH>;

	s25fl216k@0 {
		compatible = "s25fl216k", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <150000>;
		spi-cpol;
		spi-cpha;
	};
};

Also SSP0 is enabled on PhyTec phy3250 board, there is an at25 eeprom on it,
I've just briefly checked the device tree node, and apparently it contains
some references/properties specific to the PL022 SPI driver.

I've tried a couple other compatible strings ("micron,m25p16", "st,m25p16"),
I've tried a range of frequencies (from 0.5MHz to 33MHz). The 3 options for
interface are 0 (SPI), 1 (TI), or 2 (Microwire) and I've tried all of them. I
don't believe the DMA system works generically on the lpc32xx but I've tried
both interrupt <0> and polling <1> for the com-mode. I believe SPI1 and SSP0
are the same and SPI2 and SSP1 are the same (which is why I'm using SSP0
here).

The pl-022 driver is quite aggressive about shutting off the SSP and raising
the chip select after a message is sent, so I modified my driver to leave the
SSP enabled and keeping the (active-low) chip select low (in case those were
affecting the reply) but there's no change.

One thing that's curious is that the platform_info->bus_id is -1. This bus
number comes from the parent device (spi core). I wonder if this driver is not
registering itself correctly with the spi core?

Best regards,
  	Trevor

--
Best wishes,
Vladimir



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