On Mon, 31 May 2021 23:47:51 +0530, Pratyush Yadav wrote: > On Octal DTR flashes like Micron Xcella or Cypress S28 family, reads or > writes cannot start at an odd address in 8D-8D-8D mode. Neither can they > be odd bytes long. Upper layers like filesystems don't know what mode > the flash is in, and hence don't know the read/write address or length > limitations. They might issue reads or writes that leave the flash in an > error state. In fact, using UBIFS on top of the flash was how I first > noticed this problem. > > [...] Applied to spi-nor/next, thanks! [1/6] mtd: spi-nor: core: use 2 data bytes for template ops https://git.kernel.org/mtd/c/0d051a49829a [2/6] mtd: spi-nor: spansion: write 2 bytes when disabling Octal DTR mode https://git.kernel.org/mtd/c/63017068a6d9 [3/6] mtd: spi-nor: micron-st: write 2 bytes when disabling Octal DTR mode https://git.kernel.org/mtd/c/9de3cb1cc95b Best regards, -- Tudor Ambarus <tudor.ambarus@xxxxxxxxxxxxx>