Hi Evan,
On 3/20/2020 10:15 PM, Evan Green wrote:
On Fri, Mar 20, 2020 at 4:03 AM Akash Asthana <akashast@xxxxxxxxxxxxxx> wrote:
Hi Evan,
+/* Core 2X clock frequency to BCM threshold mapping */
+#define CORE_2X_19_2_MHZ 960
+#define CORE_2X_50_MHZ 2500
+#define CORE_2X_100_MHZ 5000
+#define CORE_2X_150_MHZ 7500
+#define CORE_2X_200_MHZ 10000
+#define CORE_2X_236_MHZ 16383
These are all just 50 * clock_rate. Can you instead specify that one
define of CLK_TO_BW_RATIO 50, and then use clk_get_rate() to get the
input clock frequency. That way, if these end up getting clocked at a
different rate, the bandwidth also scales appropriately. Also, can you
enumerate why 50 is an appropriate ratio?
-Evan
-Evan
Clock rate for Core 2X is controlled by BW voting only, we don't set clock rate for core 2X clock either by DFS or calling clk_set_rate API like we do for SE clocks from individual driver.
In DT node it's not mentioned as clock.
As discussed in patch@ https://patchwork.kernel.org/patch/11436897/ We are not scaling Core 2X clock based on dynamic need of driver instead we are putting recommended value from HW team for each driver.
Oh I get it. This is pretty opaque, since this table is saying "here
are the bandwidth values that happen to work out to a Core2X clock
rate of N".
Hmm, BCM threshold to CORE2X clock rate mapping is exposed to us from
clock team.
BCM threshold value is internally convert to mentioned clock rate this
is something internal to board ICC driver.
But it's not obvious why setting the Core2X clock rate to
N is desirable or appropriate. The answer seems to be hardware guys
told us these thresholds work well in practice.
Yes, this is correct as the core clocks behaves different than any other
NOC, we rely on the recommendation from VI/HW team.
And if I'm reading
into it more, probably they're saying these bandwidths are too low to
be worth dynamically managing beyond on/off
I am not sure whether they intend to say this.
At the very least we should explain some of this in the comment above
these defines. Something like:
/* Define bandwidth thresholds that cause the underlying Core 2X
interconnect clock to run at the named frequency. These baseline
values are recommended by the hardware team, and are not dynamically
scaled with GENI bandwidth beyond basic on/off. */
-Evan
Ok,
regards,
Akash
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