On Tue, Oct 22, 2019 at 03:03:18PM +0200, Geert Uytterhoeven wrote: > Is this "spi-bits-per-word" a property of the SPI slave device? > If yes, it may be better to hardcode it in the SPI slave device driver, > as it is fixed for that type of SPI slave. > If not, perhaps I'm misunderstanding the purpose. It most likely is. > > AXI Quad SPI core in a HDL design that's exactly one of the options you can > > provide. In fact, in the board I'm working with right now, I'm instantiating > > two SPI cores, one of them with 8 bits per word but the other one requires > > 32 bits per word, as the devices it's going to talk to have this > > requirement. > So you're instantiating two variants of the same "xlnx,axi-quad-spi-1.00.a" > controller, with different options? > While you could add an "xlnx,foo" DT property for that, an alternative could > be to introduce a new compatible value. > It all depends on how many options there are when instantiating such a > controller. ...and the slaves will still need to set the word length they're trying to use otherwise things might get corrupted.
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