This patch cleans up some minor issues with this driver: - Remove unnecessary header includes - Sort header alphabetically - Use correct comment style - Add return code check on device_reset() Signed-off-by: Stefan Roese <sr@xxxxxxx> Cc: Mark Brown <broonie@xxxxxxxxxx> Cc: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> Cc: NeilBrown <neil@xxxxxxxxxx> Cc: Sankalp Negi <sankalpnegi2310@xxxxxxxxx> Cc: Chuanhong Guo <gch981213@xxxxxxxxx> Cc: John Crispin <john@xxxxxxxxxxx> --- drivers/spi/spi-mt7621.c | 45 ++++++++++++++++++++-------------------- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi-mt7621.c b/drivers/spi/spi-mt7621.c index c2f6f9ce52a2..eb836fc90bfd 100644 --- a/drivers/spi/spi-mt7621.c +++ b/drivers/spi/spi-mt7621.c @@ -11,28 +11,23 @@ * Copyright (C) 2007-2008 Marvell Ltd. */ -#include <linux/init.h> -#include <linux/module.h> #include <linux/clk.h> -#include <linux/err.h> #include <linux/delay.h> #include <linux/io.h> +#include <linux/module.h> +#include <linux/of_device.h> #include <linux/reset.h> #include <linux/spi/spi.h> -#include <linux/of_device.h> -#include <linux/platform_device.h> -#include <linux/swab.h> - -#include <ralink_regs.h> #define SPI_BPW_MASK(bits) BIT((bits) - 1) -#define DRIVER_NAME "spi-mt7621" +#define DRIVER_NAME "spi-mt7621" + /* in usec */ -#define RALINK_SPI_WAIT_MAX_LOOP 2000 +#define RALINK_SPI_WAIT_MAX_LOOP 2000 /* SPISTAT register bit field */ -#define SPISTAT_BUSY BIT(0) +#define SPISTAT_BUSY BIT(0) #define MT7621_SPI_TRANS 0x00 #define SPITRANS_BUSY BIT(16) @@ -43,17 +38,15 @@ #define SPI_CTL_TX_RX_CNT_MASK 0xff #define SPI_CTL_START BIT(8) -#define MT7621_SPI_POLAR 0x38 #define MT7621_SPI_MASTER 0x28 #define MT7621_SPI_MOREBUF 0x2c +#define MT7621_SPI_POLAR 0x38 #define MT7621_SPI_SPACE 0x3c #define MT7621_CPHA BIT(5) #define MT7621_CPOL BIT(4) #define MT7621_LSB_FIRST BIT(3) -struct mt7621_spi; - struct mt7621_spi { struct spi_master *master; void __iomem *base; @@ -130,10 +123,10 @@ static int mt7621_spi_prepare(struct spi_device *spi, unsigned int speed) if (spi->mode & SPI_LSB_FIRST) reg |= MT7621_LSB_FIRST; - /* This SPI controller seems to be tested on SPI flash only - * and some bits are swizzled under other SPI modes probably - * due to incorrect wiring inside the silicon. Only mode 0 - * works correctly. + /* + * This SPI controller seems to be tested on SPI flash only and some + * bits are swizzled under other SPI modes probably due to incorrect + * wiring inside the silicon. Only mode 0 works correctly. */ reg &= ~(MT7621_CPHA | MT7621_CPOL); @@ -162,9 +155,10 @@ static inline int mt7621_spi_wait_till_ready(struct mt7621_spi *rs) static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs, int rx_len, u8 *buf) { - /* Combine with any pending write, and perform one or - * more half-duplex transactions reading 'len' bytes. - * Data to be written is already in MT7621_SPI_DATA* + /* + * Combine with any pending write, and perform one or more half-duplex + * transactions reading 'len' bytes. Data to be written is already in + * MT7621_SPI_DATA. */ int tx_len = rs->pending_write; @@ -194,6 +188,7 @@ static void mt7621_spi_read_half_duplex(struct mt7621_spi *rs, *buf++ = val & 0xff; val >>= 8; } + rx_len -= i; } } @@ -287,6 +282,7 @@ static int mt7621_spi_transfer_one_message(struct spi_master *master, mt7621_spi_flush(rs); mt7621_spi_set_cs(spi, 0); + msg_done: m->status = status; spi_finalize_current_message(master); @@ -327,6 +323,7 @@ static int mt7621_spi_probe(struct platform_device *pdev) int status = 0; struct clk *clk; struct mt7621_spi_ops *ops; + int ret; match = of_match_device(mt7621_spi_match, &pdev->dev); if (!match) @@ -374,7 +371,11 @@ static int mt7621_spi_probe(struct platform_device *pdev) rs->pending_write = 0; dev_info(&pdev->dev, "sys_freq: %u\n", rs->sys_freq); - device_reset(&pdev->dev); + ret = device_reset(&pdev->dev); + if (ret) { + dev_err(&pdev->dev, "SPI reset failed!\n"); + return ret; + } mt7621_spi_reset(rs); -- 2.20.1