RE: PATCH Prevent spi-dw write transaction split

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Hi Trent,
You said:
>  "Can you instead use gpio chip select?  This would prevent master de- asserting it when the fifo empties.  You can probably pinmux your chip to use the same pin as it uses now, but in gpio mode.
> Or try to use DMA, which will be much more reliable."
My answer is that we are using SPI-DW driver AS-IS, disabling the auto ChipSelect by the driver and do it via GPIO ourselves, or doing DMA for small transactions (our spi defined in dtb as "enable-dma = <1>"),
is a big rewrite, than the "ATOMIC" copy loop of few bytes to the tx-fifo.
I am aware of the sensitivity of "disable-interrupt", but suggests a patch which is a must to current "spi-dw" driver, and as DW SPI FIFO is bounded to few bytes I think it is not a big penalty

Gil Beniamini
Gilat Satellite Networks –  R&D
gilb@xxxxxxxxx
Phone: (972)-3-9252427 Fax:(972)-3-9293240

-----Original Message-----
From: Trent Piepho [mailto:tpiepho@xxxxxxxxxx]
Sent: Thursday, November 15, 2018 8:02 PM
To: broonie@xxxxxxxxxx; Gil Beniamini <GilB@xxxxxxxxx>
Cc: linux-spi@xxxxxxxxxxxxxxx; thor.thayer@xxxxxxxxxxxxxxx; Shay Dahan <ShayD@xxxxxxxxx>
Subject: Re: PATCH Prevent spi-dw write transaction split

On Thu, 2018-11-15 at 10:00 +0000, Gil Beniamini wrote:
>
> +/* The following while() which copies tx-data into tx-fifo, must not
> +be interrupted,
> +** interruption might lead to chip tx-fifo become empty before end of
> +the transaction data,
> +** and cause chip-select release at mid transaction, which means SPI' master-slave protocol violation!
> +*/
> +local_irq_save(flags);

Can you instead use gpio chip select?  This would prevent master de- asserting it when the fifo empties.  You can probably pinmux your chip to use the same pin as it uses now, but in gpio mode.

Or try to use DMA, which will be much more reliable.
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