Re: [PATCH, V4, 2/5] spi: bcm-qspi: Add SPI flash and MSPI driver

[Florian Fainelli <f.fainelli@xxxxxxxxx>]

On 06/22/2016 09:07 AM, Mark Brown wrote:
>> +	/*
>> +	 * MIPS endianness is configured by boot strap, which also reverses all
>> +	 * bus endianness (i.e., big-endian CPU + big endian bus ==> native
>> +	 * endian I/O).
>> +	 *
>> +	 * Other architectures (e.g., ARM) either do not support big endian, or
>> +	 * else leave I/O in little endian mode.
>> +	 */
>> +	if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
>> +		return ioread32be(qspi->base[type] + offset);
>> +	else
>> +		return readl_relaxed(qspi->base[type] + offset);
> 
> Just put this in the DT like we do for other MIPS IPs.

As in, putting a native-endian property for this node, right?
-- 
Florian
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