Re: [PATCH v1 1/1] spi: dw: revisit FIFO size detection again

[Axel Lin <axel.lin@xxxxxxxxxx>]

2015-02-25 2:43 GMT+08:00 Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>:
> The commit d297933cc7fc (spi: dw: Fix detecting FIFO depth) tries to fix the
> logic of the FIFO detection based on the description on the comments. However,
> there is a slight difference between numbers in TX Level and TX FIFO size.
>
> So, by specification the FIFO size would be in a range 2-256 bytes. From TX
> Level prospective it means we can set threshold in the range 0-(FIFO size - 1)
> bytes. Hence there are currently two issues:
>   a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be
>      either 0 or 1 byte;
>   b) FIFO size is incorrectly decreased by 1 which already done by meaning of
>      TX Level register.
>
> This patch fixes it eventually right.
>
> Fixes: d297933cc7fc (spi: dw: Fix detecting FIFO depth)
> Cc: Axel Lin <axel.lin@xxxxxxxxxx>
> Cc: stable@xxxxxxxxxxxxxxx
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>

Reviewed-by: Axel Lin <axel.lin@xxxxxxxxxx>
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