On Thu, Jan 22, 2015 at 05:59:34PM +0200, Andy Shevchenko wrote: > The clock information is being kept in the custom register on Intel MID > platforms. Each controller has its own dedicated custom register for that. > Thus, to get a proper frequency we have to read value from the specific offset > to the register block. This patch makes this happen. > > Fixes: d58cf5ff6500 (spi: dw-pci: describe Intel MID controllers better) > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> This doesn't apply to Linus' tree or my fixes branch so I've applied it to my development branch.
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