[PATCH v2 2/2] spi: dw-mid: fix number of CS lines

[Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>]

According to specification the SPI1 has 5 bits for chip selects. The current
code limits it to 4 bits. The patch fixes that constant.

Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support)
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
 drivers/spi/spi-dw-mid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index a67d37c..bd72ec6 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -270,7 +270,7 @@ int dw_spi_mid_init(struct dw_spi *dws)
 	dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1);
 	iounmap(clk_reg);
 
-	dws->num_cs = 16;
+	dws->num_cs = 32;
 
 #ifdef CONFIG_SPI_DW_MID_DMA
 	dws->dma_priv = kzalloc(sizeof(struct mid_dma), GFP_KERNEL);
-- 
2.1.3

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