On Mon, Nov 24, 2014 at 10:31:33AM -0800, Andrey Smirnov wrote: > SPI controllers found on modern SoCs have rather large SPI FIFOs and > allow for uninterrupted SPI transaction that are more then 255 bits > long. This commit adds necessary plumbing for such SPI transfers. I really don't follow how this change is connected to the changelog... > As things are right now both SPI subsystem and SPIDEV driver are > limited by their APIs to SPI transactions that are no longer than 255 > bits and that problem is exacerbated by the fact that transction > length validity verification code does not have provisions for > anything bigger than 32 bits. No, that's not the case at all. A spi_transfer can have a length that's an unsigned integer number of bytes which is much larger than 255 bits. What is the actual problem you're trying to solve here? I suspect the driver you are using is just badly implemented... > + if (!u_tmp->bits_per_word && u_tmp->bits_per_burst) > + k_tmp->bits_per_word = u_tmp->bits_per_burst; > + else > + k_tmp->bits_per_word = u_tmp->bits_per_word; This is setting the number of bits per word which is nothing to do with FIFOs or the lengths of transfers but instead concerns the formatting of data onto the bus.
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