On Fri, Jun 13, 2014 at 11:57:25PM +0800, Chew Chiau Ee wrote: > From: Chew, Chiau Ee <chiau.ee.chew@xxxxxxxxx> > > It was observed that after module removal followed by insertion, > the SW mode chipselect is not properly set. Thus causing transfer > failure due to incorrect CS toggling. > > Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@xxxxxxxxx> Acked-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [PATCH v2] spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
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- Subject: Re: [PATCH v2] spi/pxa2xx: fix incorrect SW mode chipselect setting for BayTrail LPSS SPI
- From: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx>
- Date: Fri, 13 Jun 2014 16:10:08 +0300
- In-reply-to: <1402675045-22460-1-git-send-email-chiau.ee.chew@intel.com>
- Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
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