On Mon, Apr 14, 2014 at 02:30:01PM +0800, Barry Song wrote: > From: Qipan Li <Qipan.Li@xxxxxxx> > > sometimes t->tx can be equal with t->rx. for example, spidev will make > tx and rx point to spidev->buffer at the same time. currently, for this > case, we map the buffer BIDIRECTION to fix the cache consistency. I've applied this but such usage is out of spec - do we have any drivers doing this in mainline?
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