On Thu, Mar 27, 2014 at 06:24:16PM +0100, Gerhard Sittig wrote: > can you reproduce this on other hardware? the change looks > innocent, and the core routine looks straight forward -- is some > expensive diagnostics enabled ATM during transition to common > logic? Right, the loops look almost identical (as they should, that's the whole reason for pulling things into the core). I've not noticed this with s3c64xx though I don't have flash there. Can you try turning the tracepoints on and see if they show where the delays are? Both the message pump and transfer loops have a reasonable number of tracepoints in them.
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