SCC: a sparse based compiler backend

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Since it seems to be an interest on the subject, here is a
small compiler, or more exactly, a partial compiler backend.

Acessing symbols is very limited though and there is nothing
done yet for register allocation (and even less scheduling).

It can currently generate code for ARM & ARM64 and can easily
be adapted for other RISC arch. Code for x86 would need more work.

I don't feel the need to patchbomb the ML so here is the URL:
  git://github.com/lucvoo/sparse.git codegen

-- Luc
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