Quoting Taniya Das (2018-11-24 20:36:07)
> From: Amit Nischal <anischal@xxxxxxxxxxxxxx>
>
> Add device tree bindings for graphics clock controller for
> Qualcomm Technology Inc's SDM845 SoCs.
>
> Signed-off-by: Amit Nischal <anischal@xxxxxxxxxxxxxx>
You could have added your sign off here, but I don't think this is
really different from the original posting that's on the list so it's
OK.
> ---
> .../devicetree/bindings/clock/qcom,gpucc.txt | 18 ++++++++++++++++
> include/dt-bindings/clock/qcom,gpucc-sdm845.h | 24 ++++++++++++++++++++++
> 2 files changed, 42 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/qcom,gpucc.txt
> create mode 100644 include/dt-bindings/clock/qcom,gpucc-sdm845.h
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.txt b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
> new file mode 100644
> index 0000000..93752db
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.txt
> @@ -0,0 +1,18 @@
> +Qualcomm Graphics Clock & Reset Controller Binding
> +--------------------------------------------------
> +
> +Required properties :
> +- compatible : shall contain "qcom,sdm845-gpucc".
> +- reg : shall contain base register location and length.
> +- #clock-cells : from common clock binding, shall contain 1.
> +- #reset-cells : from common reset binding, shall contain 1.
> +- #power-domain-cells : from generic power domain binding, shall contain 1.
> +
> +Example:
> + gpucc: clock-controller@5090000 {
> + compatible = "qcom,sdm845-gpucc";
> + reg = <0x5090000 0x9000>;
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
I would expect to see the xo clk here as a clocks and clock-names
property. I added it myself and applied to clk-next.
