[v1]
* Update SPDX for files.
* Add new clk_ops for DFS mode which would be used if dfs is enabled,
else fall back to the clk_rcg2_shared_ops.
* Use kcalloc in place kzalloc.
* Fixed the return type for 'clk_parent_index_pre_div_and_mode' which
is now renamed to 'clk_index_pre_div_and_mode'.
* Removed return of -EPERM from 'clk_rcg2_set_rate' and new dfs
clk_ops is introduced.
* Pass frequency table entry structure to function calculate_m_and_n.
* Remove desc from qcom_cc_register_rcg_dfs and instead pass array of
clk_rcg2.
* Add a dfs_enable flag to identify if dfs mode is enabled.
In the cases where a RCG requires a Dynamic Frequency switch support
requires to register which would at runtime read the clock perf level
registers to identify the frequencies supported and update the frequency
table accordingly.
Taniya Das (1):
clk: qcom: Add support for RCG to register for DFS
drivers/clk/qcom/clk-rcg.h | 6 +
drivers/clk/qcom/clk-rcg2.c | 272 ++++++++++++++++++++++++++++++++++++++++++++
drivers/clk/qcom/common.c | 22 ++++
drivers/clk/qcom/common.h | 18 +--
4 files changed, 306 insertions(+), 12 deletions(-)
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