Hi Alexandru, On Wed, 2017-08-16 at 15:15 -0700, Alexandru Gagniuc wrote: > This is split into the SOC bindings, and the board dts. The Endor > board is currently an FPGA emulation. Once real, silicon arrives, we > plan to remove Endor support. > > Signed-off-by: Alexandru Gagniuc <alex.g at adaptrum.com> > --- > ?arch/arc/boot/dts/adaptrum_anarion.dtsi?????| 110 > ++++++++++++++++++++++++++++ > ?arch/arc/boot/dts/adaptrum_anarion_fpga.dts |??51 +++++++++++++ > ?2 files changed, 161 insertions(+) > ?create mode 100644 arch/arc/boot/dts/adaptrum_anarion.dtsi > ?create mode 100644 arch/arc/boot/dts/adaptrum_anarion_fpga.dts > > diff --git a/arch/arc/boot/dts/adaptrum_anarion.dtsi > b/arch/arc/boot/dts/adaptrum_anarion.dtsi > new file mode 100644 > index 0000000..e177a24 > --- /dev/null > +++ b/arch/arc/boot/dts/adaptrum_anarion.dtsi > @@ -0,0 +1,110 @@ > +/* > + * Skeleton for Adaptrum Anarion SOC > + * > + * (C) Copyright 2017 Adaptrum, Inc. > + * Written by Alexandru Gagniuc <alex.g at adaptrum.com> for Adaptrum, > Inc. > + * Licensed under the GPLv2 or (at your option) any later version > + */ > + > +/* This skeleton is based on the ARC700 CPU */ > +#include "skeleton.dtsi" Perhaps it is better not to use skeleton.dtsi as we are planning to get rid of it. -- ?Eugeniy Paltsev
