Hi all, This patch series adds initial support for the Renesas RZ/G3E SoC and RZ/G3E SMARC EVK platform. The RZ/G3E device is a general-purpose microprocessor with a quad-core CA-55, single core CM-33, Ethos-U55 NPU , Mali-G52 3-D Graphics and other peripherals. Support for below list of blocks added on SoC DTSI (r9a09g047.dtsi): - EXT CLKs - 4X CA55 - SCIF - CPG - GIC - ARMv8 Timer This adds also support for the RZ/G3E SMARC EVK board (r9a09g047e57-smarc.dts) and enable the following peripheral: - SCIF This patch series depend upon [1] [1] https://lore.kernel.org/all/20241202203916.48668-1-prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx/ Note: This patch series gives a linux prompt with initramfs. Later there is a plan to add support for SoC Identification using SYSC driver and pin controller. v1->v2: * Collected tags. * Fixed typo "CORE_CLK*"->"CORECLK*" to match with hardware manual in the clk bindings. * Added MSTOP data for RZ/V2H CRU IP. * Fixed typo clock->clk in error path of rzv2h_cpg_register_mod_clk(). * Added OPP table support for frequency scaling. Biju Das (13): dt-bindings: serial: renesas: Document RZ/G3E (r9a09g047) scif dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variants dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVK dt-bindings: clock: renesas: Document RZ/G3E SoC CPG soc: renesas: Add RZ/G3E (R9A09G047) config option clk: renesas: Add support for RZ/G3E SoC clk: renesas: rzv2h-cpg: Add MSTOP support clk: renesas: r9a09g047: Add CA55 core clocks arm64: dts: renesas: Add initial DTSI for RZ/G3E SoC arm64: dts: renesas: r9a09g047: Add OPP table arm64: dts: renesas: Add initial support for RZ/G3E SMARC SoM arm64: dts: renesas: Add initial device tree for RZ/G3E SMARC EVK board arm64: defconfig: Enable R9A09G047 SoC .../bindings/clock/renesas,rzv2h-cpg.yaml | 15 +- .../bindings/serial/renesas,scif.yaml | 5 + .../bindings/soc/renesas/renesas.yaml | 17 ++ arch/arm64/boot/dts/renesas/Makefile | 2 + arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 185 ++++++++++++++++++ arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi | 18 ++ .../boot/dts/renesas/r9a09g047e57-smarc.dts | 18 ++ arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi | 13 ++ .../boot/dts/renesas/renesas-smarc2.dtsi | 24 +++ .../boot/dts/renesas/rzg3e-smarc-som.dtsi | 28 +++ arch/arm64/configs/defconfig | 1 + drivers/clk/renesas/Kconfig | 7 +- drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/r9a09g047-cpg.c | 116 +++++++++++ drivers/clk/renesas/r9a09g057-cpg.c | 153 ++++++++++----- drivers/clk/renesas/rzv2h-cpg.c | 98 +++++++++- drivers/clk/renesas/rzv2h-cpg.h | 27 ++- drivers/soc/renesas/Kconfig | 5 + .../dt-bindings/clock/renesas,r9a09g047-cpg.h | 21 ++ 19 files changed, 686 insertions(+), 68 deletions(-) create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e37.dtsi create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts create mode 100644 arch/arm64/boot/dts/renesas/r9a09g047e57.dtsi create mode 100644 arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi create mode 100644 arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi create mode 100644 drivers/clk/renesas/r9a09g047-cpg.c create mode 100644 include/dt-bindings/clock/renesas,r9a09g047-cpg.h -- 2.43.0
