From: Claudiu Beznea <claudiu.beznea.uj@xxxxxxxxxxxxxx>
Hi,
The Renesas RZ/G3S SoC has 6 serial interfaces. One of them is used
as debug console (and it is already enabled in the current code base).
Series adds support for the remaining ones.
Patches:
- 01/09 - adds clock, reset and power domain support for the serial
interfaces
- 02-03/09 - serial driver fixes patches identified while adding RZ/G3S
support
- 04/09 - extends suspend to RAM support on the serial driver for
the RZ/G3S SoC
- 05-09/09 - add device tree support
Merge strategy, if any:
- patch 01/09 can go through Renesas tree
- patches 02-04/09 can go through serial tree
- patches 05-09/09 can go through Renesas tree
Thank you,
Claudiu Beznea
Claudiu Beznea (9):
clk: renesas: r9a08g045: Add clock, reset and power domain for the
remaining SCIFs
serial: sh-sci: Check if TX data was written to device in .tx_empty()
serial: sh-sci: Clean sci_ports[0] after at earlycon exit
serial: sh-sci: Update the suspend/resume support
arm64: dts: renesas: r9a08g045: Add the remaining SCIF interfaces
arm64: dts: renesas: rzg3s-smarc: Fix the debug serial alias
arm64: dts: renesas: rzg3s-smarc-switches: Add a header to describe
different switches
arm64: dts: renesas: rzg3s-smarc: Enable SCIF3
arm64: dts: renesas: r9a08g045s33-smarc-pmod: Add overlay for SCIF1
arch/arm64/boot/dts/renesas/Makefile | 3 +
arch/arm64/boot/dts/renesas/r9a08g045.dtsi | 90 ++++++++++++++++++
.../dts/renesas/r9a08g045s33-smarc-pmod.dtso | 48 ++++++++++
.../boot/dts/renesas/rzg3s-smarc-som.dtsi | 25 +----
.../boot/dts/renesas/rzg3s-smarc-switches.h | 32 +++++++
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 25 ++++-
drivers/clk/renesas/r9a08g045-cpg.c | 20 ++++
drivers/tty/serial/sh-sci.c | 92 +++++++++++++++++--
8 files changed, 301 insertions(+), 34 deletions(-)
create mode 100644 arch/arm64/boot/dts/renesas/r9a08g045s33-smarc-pmod.dtso
create mode 100644 arch/arm64/boot/dts/renesas/rzg3s-smarc-switches.h
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2.39.2
