On Fri, 6 Sep 2024 15:46:51 +0300 Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote: > On Fri, May 03, 2024 at 02:33:03PM -0400, Parker Newman wrote: > > On Fri, 3 May 2024 20:15:52 +0300 > > Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx> wrote: > > > > > After a rework for CONNTECH was done, the driver may need a bit of > > > love in order to become less verbose (in terms of indentation and > > > code duplication) and hence easier to read. > > > > > > This clean up series fixes a couple of (not so critical) issues and > > > cleans up the recently added code. No functional change indented by > > > the cleaning up part. > > > > > > Parker, please test this and give your formal Tested-by tag > > > (you may do it by replying to this message if all patches are > > > successfully tested; more details about tags are available in > > > the Submitting Patches documentation). > > > > I was able to test the Connect Tech related code and everything is > > work as expected. I can't test the non-CTI related changes but they > > are pretty minor. > > > > Tested-by: Parker Newman <pnewman@xxxxxxxxxxxxxxx> > > Sorry for blast from the past, but I have some instersting information > for you. We now have spi-gpio and 93c46 eeprom drivers available to be > used from others via software nodes, can you consider updating your code > to replace custom bitbanging along with r/w ops by the instantiating the > respective drivers? > Hi Andy, The Exar UARTs don't actually use MPIO/GPIO for the EEPROM. They have a dedicated "EEPROM interface" which is accessed by the REGB (0x8E) register. It is a very simple bit-bang interface though, one bit per signal. I guess in theory I could either add GPIO wrapper to toggle these bits and use the spi-gpio driver but I am not sure if that really improves things? Maybe using the spi-bitbang driver directly is more appropriate? What do you think? Thanks, Parker
