Fabio Estevam <festevam@xxxxxxxxx> writes: > On Fri, Apr 5, 2024 at 6:25 AM Esben Haabendal <esben@xxxxxxxxxx> wrote: >> >> By waiting at most 1 second for USR2_TXDC to be set, we avoid a potentital > > s/potentital/potential > > Could you elaborate on this deadlock? Have you seen it in practice? I've stumped upon this piece of code a long time ago, and it's indeed broken. However, to actually see a "deadlock", I believe one needs to enable hardware RTS/CTS handshake on the port, then, say, not connect RS232 cable, and then printk(), if enabled to this port, will soon result in the loop to be executed forever, that in turn will hang single-CPU machine entirely (provided this code is still executed with interrupts disabled, as it was at the time I investigated severe printk()-induced ISR delays). -- Sergey Organov