On Fri, 1 Dec 2023 18:34:38 +0000
Mark Brown <broonie@xxxxxxxxxx> wrote:
> On Fri, Dec 01, 2023 at 01:27:36PM -0500, Hugo Villeneuve wrote:
>
> > it is funny, as I am preparing to send a patch for the sc16is7xx driver
> > to convert FIFO R/W to use the _noinc_ versions of regmap functions,
> > inspired by your patch 3f42b142ea11 ("serial: max310x: fix IO data
> > corruption in batched operations").
>
> If you're working on that driver it'd also be good to update the current
> use of cache bypass for the enhanced features/interrupt identification
> register (and anything else in there, that did seem to be the only one)
> to use regmap ranges instead - that'd remove the need for the efr_lock
> and be a much more sensible/idiomatic use of the regmap APIs.
Hi Mark,
agreed, and I have already removed all cache bypass code (after some
fix for volatile registers)...
I will also look to remove the efr_lock, altough it has more
implications since this ship has some registers that share a common
address, and selected by bits in other registers, and I think this
is why there is this efr_lock.
I need to run more tests to make sure everything is ok, but so far
so good, and I should be submitting some of these patches soon.
Hugo Villeneuve.
