Bingo, you have threaded emails!
On Fri, Sep 22, 2023 at 02:22:11PM +0000, Matthew Howell wrote:
> From: Matthew Howell <matthew.howell@xxxxxxxxxxxx>
>
> Sealevel XR17V35X based cards utilize DTR to control RS-485 Enable, but
> the current implementation of 8250_exar uses RTS for the auto-RS485-Enable
> mode of the XR17V35X UARTs. This patch implements DTR Auto-RS485 on
> Sealevel cards.
Btw, few ideas for further improvements / questions.
...
> +static int pci_sealevel_setup(struct exar8250 *priv, struct pci_dev *pcidev,
> + struct uart_8250_port *port, int idx)
> +{
> + int ret;
> +
> + ret = pci_xr17v35x_setup(priv, pcidev, port, idx);
> + if (ret)
> + return ret;
> +
> + port->port.rs485_config = sealevel_rs485_config;
> +
> + return 0;
> +}
This actually can be embedded into original pci_xr17v35x_setup() as
if (pdev->subsystem_vendor == PCI_VENDOR_ID_SEALEVEL)
port->port.rs485_config = sealevel_rs485_config;
...
> + SEALEVEL_DEVICE(XR17V4358, pbn_sealevel_16),
This is kinda worries me. Original Exar card has12 port, why 16 is in use for this one?
> + SEALEVEL_DEVICE(XR17V8358, pbn_sealevel_16),
With the above suggestion this will be fixed automatically.
--
With Best Regards,
Andy Shevchenko
