On Thu, Sep 14, 2023 at 12:06 AM Jiri Slaby <jirislaby@xxxxxxxxxx> wrote: > > On 13. 09. 23, 23:14, Max Filippov wrote: > > Add driver for the UART controllers of the Espressif ESP32 and ESP32S3 > > SoCs. Hardware specification is available at the following URLs: > > > > https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf > > (Chapter 13 UART Controller) > > https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf > > (Chapter 26 UART Controller) > > > > Signed-off-by: Max Filippov <jcmvbkbc@xxxxxxxxx> > > --- > ... > > +#define UART_FIFO_REG 0x00 > > +#define UART_INT_RAW_REG 0x04 > > +#define UART_INT_ST_REG 0x08 > > +#define UART_INT_ENA_REG 0x0c > > +#define UART_INT_CLR_REG 0x10 > > +#define UART_RXFIFO_FULL_INT_MASK 0x00000001 > > +#define UART_TXFIFO_EMPTY_INT_MASK 0x00000002 > > +#define UART_BRK_DET_INT_MASK 0x00000080 > > +#define UART_CLKDIV_REG 0x14 > > +#define ESP32_UART_CLKDIV_MASK 0x000fffff > > +#define ESP32S3_UART_CLKDIV_MASK 0x00000fff > > +#define UART_CLKDIV_SHIFT 0 > > +#define UART_CLKDIV_FRAG_MASK 0x00f00000 > > +#define UART_CLKDIV_FRAG_SHIFT 20 > > +#define UART_STATUS_REG 0x1c > > +#define ESP32_UART_RXFIFO_CNT_MASK 0x000000ff > > +#define ESP32S3_UART_RXFIFO_CNT_MASK 0x000003ff > > Can you use GENMASK() for all these? Ok. > > +#define UART_RXFIFO_CNT_SHIFT 0 > > +#define UART_DSRN_MASK 0x00002000 > > +#define UART_CTSN_MASK 0x00004000 > > +#define ESP32_UART_TXFIFO_CNT_MASK 0x00ff0000 > > +#define ESP32S3_UART_TXFIFO_CNT_MASK 0x03ff0000 > > +#define UART_TXFIFO_CNT_SHIFT 16 > > +#define UART_ST_UTX_OUT_MASK 0x0f000000 > > +#define UART_ST_UTX_OUT_IDLE 0x00000000 > > +#define UART_ST_UTX_OUT_SHIFT 24 > > +#define UART_CONF0_REG 0x20 > > +#define UART_PARITY_MASK 0x00000001 > > +#define UART_PARITY_EN_MASK 0x00000002 > > +#define UART_BIT_NUM_MASK 0x0000000c > > +#define UART_BIT_NUM_5 0x00000000 > > +#define UART_BIT_NUM_6 0x00000004 > > +#define UART_BIT_NUM_7 0x00000008 > > +#define UART_BIT_NUM_8 0x0000000c > > +#define UART_STOP_BIT_NUM_MASK 0x00000030 > > +#define UART_STOP_BIT_NUM_1 0x00000010 > > +#define UART_STOP_BIT_NUM_2 0x00000030 > > +#define UART_SW_RTS_MASK 0x00000040 > > +#define UART_SW_DTR_MASK 0x00000080 > > +#define UART_LOOPBACK_MASK 0x00004000 > > +#define UART_TX_FLOW_EN_MASK 0x00008000 > > +#define UART_RTS_INV_MASK 0x00800000 > > +#define UART_DTR_INV_MASK 0x01000000 > > +#define ESP32_UART_TICK_REF_ALWAYS_ON_MASK 0x08000000 > > +#define ESP32S3_UART_TICK_REF_ALWAYS_ON_MASK 0x00000000 > > +#define UART_CONF1_REG 0x24 > > +#define ESP32_UART_RXFIFO_FULL_THRHD_MASK 0x0000007f > > +#define ESP32S3_UART_RXFIFO_FULL_THRHD_MASK 0x000003ff > > +#define UART_RXFIFO_FULL_THRHD_SHIFT 0 > > +#define ESP32_UART_TXFIFO_EMPTY_THRHD_MASK 0x00007f00 > > +#define ESP32S3_UART_TXFIFO_EMPTY_THRHD_MASK 0x000ffc00 > > +#define ESP32_UART_TXFIFO_EMPTY_THRHD_SHIFT 8 > > +#define ESP32S3_UART_TXFIFO_EMPTY_THRHD_SHIFT 10 > > +#define ESP32_UART_RX_FLOW_EN_MASK 0x00800000 > > +#define ESP32S3_UART_RX_FLOW_EN_MASK 0x00400000 > ... > > > +static void esp32_uart_put_char_sync(struct uart_port *port, unsigned char c) > > u8 for characters everywhere, please. Ok, but I guess not everywhere? E.g. uart_ops::poll_put_char has 'unsigned char' in the definition, it seems better to keep implementation in sync. > > +{ > > + while (esp32_uart_tx_fifo_cnt(port) >= ESP32_UART_TX_FIFO_SIZE) > > + cpu_relax(); > > No timeout? There should be one. Ok. > > + esp32_uart_put_char(port, c); > > +} > > + > > +static void esp32_uart_transmit_buffer(struct uart_port *port) > > +{ > > + struct circ_buf *xmit = &port->state->xmit; > > + u32 tx_fifo_used = esp32_uart_tx_fifo_cnt(port); > > + > > + while (!uart_circ_empty(xmit) && tx_fifo_used < ESP32_UART_TX_FIFO_SIZE) { > > + esp32_uart_put_char(port, xmit->buf[xmit->tail]); > > + xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); > > + port->icount.tx++; > > + ++tx_fifo_used; > > + } > > Why not using uart_port_tx_limited()? Ok. > > + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) > > + uart_write_wakeup(port); > > + > > + if (uart_circ_empty(xmit)) { > > + esp32_uart_stop_tx(port); > > + } else { > > + u32 int_ena; > > + > > + int_ena = esp32_uart_read(port, UART_INT_ENA_REG); > > + esp32_uart_write(port, UART_INT_ENA_REG, > > + int_ena | UART_TXFIFO_EMPTY_INT_MASK); > > + } > > +} > > + > > +static void esp32_uart_txint(struct uart_port *port) > > +{ > > + esp32_uart_transmit_buffer(port); > > +} > > + > > +static irqreturn_t esp32_uart_int(int irq, void *dev_id) > > +{ > > + struct uart_port *port = dev_id; > > + u32 status; > > + > > + status = esp32_uart_read(port, UART_INT_ST_REG); > > + > > + if (status & (UART_RXFIFO_FULL_INT_MASK | UART_BRK_DET_INT_MASK)) > > + esp32_uart_rxint(port); > > + if (status & UART_TXFIFO_EMPTY_INT_MASK) > > + esp32_uart_txint(port); > > + > > + esp32_uart_write(port, UART_INT_CLR_REG, status); > > + return IRQ_HANDLED; > > This should be IRQ_RETVAL(status) or similar. To let the system disable > the irq in case the HW gets crazy. Ok. > > +static void esp32_uart_start_tx(struct uart_port *port) > > +{ > > + esp32_uart_transmit_buffer(port); > > +} > > + > > +static void esp32_uart_stop_rx(struct uart_port *port) > > +{ > > + u32 int_ena; > > + > > + int_ena = esp32_uart_read(port, UART_INT_ENA_REG); > > + esp32_uart_write(port, UART_INT_ENA_REG, > > + int_ena & ~UART_RXFIFO_FULL_INT_MASK); > > +} > > + > > +static int esp32_uart_startup(struct uart_port *port) > > +{ > > + int ret = 0; > > + unsigned long flags; > > + struct esp32_port *sport = container_of(port, struct esp32_port, port); > > + > > + ret = clk_prepare_enable(sport->clk); > > + if (ret) > > + return ret; > > + > > + spin_lock_irqsave(&port->lock, flags); > > + esp32_uart_write(port, UART_CONF1_REG, > > + (1 << UART_RXFIFO_FULL_THRHD_SHIFT) | > > + (1 << port_variant(port)->txfifo_empty_thrhd_shift)); > > + esp32_uart_write(port, UART_INT_CLR_REG, > > + UART_RXFIFO_FULL_INT_MASK | > > + UART_BRK_DET_INT_MASK); > > + esp32_uart_write(port, UART_INT_ENA_REG, > > + UART_RXFIFO_FULL_INT_MASK | > > + UART_BRK_DET_INT_MASK); > > + spin_unlock_irqrestore(&port->lock, flags); > > So interrupts can be coming now, but you don't handle them yet? Reordered it with the irq handler installation. > > + ret = devm_request_irq(port->dev, port->irq, esp32_uart_int, 0, > > + DRIVER_NAME, port); > > You don't disable clk and interrupts in case of failure? Fixed. > > + pr_debug("%s, request_irq: %d, conf1 = %08x, int_st = %08x, status = %08x\n", > > + __func__, ret, > > + esp32_uart_read(port, UART_CONF1_REG), > > + esp32_uart_read(port, UART_INT_ST_REG), > > + esp32_uart_read(port, UART_STATUS_REG)); > > + return ret; > > +} > ... > > +static void esp32_uart_set_termios(struct uart_port *port, > > + struct ktermios *termios, > > + const struct ktermios *old) > > +{ > > + unsigned long flags; > > + u32 conf0, conf1; > > + u32 baud; > > + const u32 rx_flow_en = port_variant(port)->rx_flow_en; > > + > > + spin_lock_irqsave(&port->lock, flags); > > + conf0 = esp32_uart_read(port, UART_CONF0_REG) & > > + ~(UART_PARITY_EN_MASK | UART_PARITY_MASK | > > + UART_BIT_NUM_MASK | UART_STOP_BIT_NUM_MASK); > > Perhaps it would be more readable as: > conf0 = esp32_uart_read(port, UART_CONF0_REG); > conf0 &= ~(UART_PARITY_EN_MASK | ...); > ? Ok. > > + conf1 = esp32_uart_read(port, UART_CONF1_REG) & > > + ~rx_flow_en; > > + > > + if (termios->c_cflag & PARENB) { > > + conf0 |= UART_PARITY_EN_MASK; > > + if (termios->c_cflag & PARODD) > > + conf0 |= UART_PARITY_MASK; > > + } > > > > +static void esp32_uart_release_port(struct uart_port *port) > > +{ > > +} > > + > > +static int esp32_uart_request_port(struct uart_port *port) > > +{ > > + return 0; > > +} > > Drop these two. Ok > > +static int esp32_uart_probe(struct platform_device *pdev) > > +{ > > + struct device_node *np = pdev->dev.of_node; > > + static const struct of_device_id *match; > > + struct uart_port *port; > > + struct esp32_port *sport; > > + struct resource *res; > > + int ret; > > + > > + match = of_match_device(esp32_uart_dt_ids, &pdev->dev); > > + if (!match) > > + return -ENODEV; > > + > > + sport = devm_kzalloc(&pdev->dev, sizeof(*sport), GFP_KERNEL); > > + if (!sport) > > + return -ENOMEM; > > + > > + port = &sport->port; > > + > > + ret = of_alias_get_id(np, "serial"); > > + if (ret < 0) { > > + dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); > > + return ret; > > + } > > + if (ret >= UART_NR) { > > + dev_err(&pdev->dev, "driver limited to %d serial ports\n", > > + UART_NR); > > + return -ENOMEM; > > + } > > + > > + port->line = ret; > > + > > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > > + if (!res) > > + return -ENODEV; > > + > > + port->mapbase = res->start; > > + port->membase = devm_ioremap_resource(&pdev->dev, res); > > + if (IS_ERR(port->membase)) > > + return PTR_ERR(port->membase); > > + > > + sport->clk = devm_clk_get(&pdev->dev, NULL); > > + if (IS_ERR(sport->clk)) > > + return PTR_ERR(sport->clk); > > + > > + port->uartclk = clk_get_rate(sport->clk); > > + port->dev = &pdev->dev; > > + port->type = PORT_ESP32UART; > > + port->iotype = UPIO_MEM; > > + port->irq = platform_get_irq(pdev, 0); > > + port->ops = &esp32_uart_pops; > > + port->flags = UPF_BOOT_AUTOCONF; > > + port->has_sysrq = 1; > > + port->fifosize = ESP32_UART_TX_FIFO_SIZE; > > + port->private_data = (void *)match->data; > > + > > + esp32_uart_ports[port->line] = sport; > > + > > + platform_set_drvdata(pdev, port); > > + > > + ret = uart_add_one_port(&esp32_uart_reg, port); > > + return ret; > > You can skip ret here and return directly. Ok -- Thanks. -- Max
