On 8/11/2023 3:14 PM, Justin Chen wrote:
The 8250 bcm7271 UART is not a direct match to PORT_16550A. The
Fifo is 32 and rxtrig values are {1, 8, 16, 30}. Create a PORT_BCM7271
to better capture the HW CAPS.
Default the rxtrig level to 8.
Signed-off-by: Justin Chen <justin.chen@xxxxxxxxxxxx>
Acked-by: Doug Berger <opendmb@xxxxxxxxx> Thanks Justin! -- Doug
