Re: [PATCH 2/3] gpio: sprd: In the sleep state, the eic dbnc clk must be forced open

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On Tue, Aug 8, 2023 at 5:36 PM Chunyan Zhang <zhang.lyra@xxxxxxxxx> wrote:
>
> On Tue, 8 Aug 2023 at 11:32, Wenhua Lin <Wenhua.Lin@xxxxxxxxxx> wrote:
> >
> > In the sleep state, Eic dbnc has no clock and the clk enable
>
> Does "dbnc" mean "debounce"? I suggest not using abbreviation here.

Hi chunyan:
    dbnc is debounce, We will make changes in patch v2.

Thanks

>
> > of dbnc needs to be forced open, so that eic can wake up normally.
> >
> > Signed-off-by: Wenhua Lin <Wenhua.Lin@xxxxxxxxxx>
> > ---
> >  drivers/gpio/gpio-eic-sprd.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpio/gpio-eic-sprd.c b/drivers/gpio/gpio-eic-sprd.c
> > index 0d85d9e80848..c506cfd6df8e 100644
> > --- a/drivers/gpio/gpio-eic-sprd.c
> > +++ b/drivers/gpio/gpio-eic-sprd.c
> > @@ -23,6 +23,7 @@
> >  #define SPRD_EIC_DBNC_IC               0x24
> >  #define SPRD_EIC_DBNC_TRIG             0x28
> >  #define SPRD_EIC_DBNC_CTRL0            0x40
> > +#define SPRD_EIC_DBNC_FORCE_CLK                0x8000
> >
> >  #define SPRD_EIC_LATCH_INTEN           0x0
> >  #define SPRD_EIC_LATCH_INTRAW          0x4
> > @@ -213,6 +214,7 @@ static int sprd_eic_set_debounce(struct gpio_chip *chip, unsigned int offset,
> >         u32 value = readl_relaxed(base + reg) & ~SPRD_EIC_DBNC_MASK;
> >
> >         value |= (debounce / 1000) & SPRD_EIC_DBNC_MASK;
> > +       value |= SPRD_EIC_DBNC_FORCE_CLK;
> >         writel_relaxed(value, base + reg);
> >
> >         return 0;
> > --
> > 2.17.1
> >




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