On 2023. 06. 07. 12:34, Robert Hodaszi wrote:
> This reverts commit 9ad9df8447547febe9dd09b040f4528a09e495f0.
>
> LSUART's datasheet incorrectly states that RXWATER must be greater than
> 0. Having that set to 1 is causing a one character delay on the receive
> path.
>
> Signed-off-by: Robert Hodaszi <robert.hodaszi@xxxxxxxx>
> ---
> drivers/tty/serial/fsl_lpuart.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c
> index 7486a2b8556c..8f1bb0a378d4 100644
> --- a/drivers/tty/serial/fsl_lpuart.c
> +++ b/drivers/tty/serial/fsl_lpuart.c
> @@ -1762,6 +1762,12 @@ static void lpuart32_configure(struct lpuart_port *sport)
> {
> unsigned long temp;
>
> + if (sport->lpuart_dma_rx_use) {
> + /* RXWATER must be 0 */
> + temp = lpuart32_read(&sport->port, UARTWATER);
> + temp &= ~(UARTWATER_WATER_MASK << UARTWATER_RXWATER_OFF);
> + lpuart32_write(&sport->port, temp, UARTWATER);
> + }
> temp = lpuart32_read(&sport->port, UARTCTRL);
> if (!sport->lpuart_dma_rx_use)
> temp |= UARTCTRL_RIE | UARTCTRL_ILIE;
Here's a thread, which seems confirm it:
https://community.nxp.com/t5/i-MX-RT/RT1050-LPUART-RXWATER-documentation-error/td-p/892379
