Re: Regression: serial: imx: overrun errors on debug UART

[Stefan Wahren <stefan.wahren@xxxxxxxx>]

Hi Fabio,

Am 24.03.23 um 13:57 schrieb Fabio Estevam:
> Hi Stefan,
>
> On Fri, Mar 24, 2023 at 8:48 AM Ilpo Järvinen
> <ilpo.jarvinen@xxxxxxxxxxxxxxx> wrote:
>
> > This has come up earlier, see e.g.:
> >
> > https://lore.kernel.org/linux-serial/20221003110850.GA28338@xxxxxxxxxxxxxxxxxxxxxxxxxxxx/
> >
> > My somewhat uninformed suggestion: if the overrun problems mostly show up
> > with console ports, maybe the trigger level could depend on the port
> > being a console or not?
> Does the change below help? Taking Ilpo's suggestion into account:
this breaks the boot / debug console completely, but i got the idea.
> diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
> index 0fa1bd8cdec7..4d0aae38b7a5 100644
> --- a/drivers/tty/serial/imx.c
> +++ b/drivers/tty/serial/imx.c
> @@ -233,6 +233,7 @@ struct imx_port {
>          enum imx_tx_state       tx_state;
>          struct hrtimer          trigger_start_tx;
>          struct hrtimer          trigger_stop_tx;
> +       unsigned int            rxtl;
>   };
>
>   struct imx_port_ucrs {
> @@ -1309,6 +1310,7 @@ static void imx_uart_clear_rx_errors(struct
> imx_port *sport)
>   }
>
>   #define TXTL_DEFAULT 2 /* reset default */
> +#define RXTL_DEFAULT_CONSOLE 1 /* 1 character or aging timer */
>   #define RXTL_DEFAULT 8 /* 8 characters or aging timer */
>   #define TXTL_DMA 8 /* DMA burst setting */
>   #define RXTL_DMA 9 /* DMA burst setting */
> @@ -1422,7 +1424,7 @@ static void imx_uart_disable_dma(struct imx_port *sport)
>          ucr1 &= ~(UCR1_RXDMAEN | UCR1_TXDMAEN | UCR1_ATDMAEN);
>          imx_uart_writel(sport, ucr1, UCR1);
>
> -       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
> +       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, sport->rxtl);
>
>          sport->dma_is_enabled = 0;
>   }
> @@ -1447,7 +1449,7 @@ static int imx_uart_startup(struct uart_port *port)
>                  return retval;
>          }
>
> -       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
> +       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, sport->rxtl);
I think at lea this point sport->rxtl is not properly initialized.
>          /* disable the DREN bit (Data Ready interrupt enable) before
>           * requesting IRQs
> @@ -1464,6 +1466,11 @@ static int imx_uart_startup(struct uart_port *port)
>          if (!uart_console(port) && imx_uart_dma_init(sport) == 0)
>                  dma_is_inited = 1;
>
> +       if (uart_console(port))
> +               sport->rxtl = RXTL_DEFAULT_CONSOLE;
> +       else
> +               sport->rxtl = RXTL_DEFAULT;
> +
>          spin_lock_irqsave(&sport->port.lock, flags);
>
>          /* Reset fifo's and state machines */
> @@ -1863,7 +1870,7 @@ static int imx_uart_poll_init(struct uart_port *port)
>          if (retval)
>                  clk_disable_unprepare(sport->clk_ipg);
>
> -       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
> +       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, sport->rxtl);
>
>          spin_lock_irqsave(&sport->port.lock, flags);
>
> @@ -2139,7 +2146,7 @@ imx_uart_console_setup(struct console *co, char *options)
>          else
>                  imx_uart_console_get_options(sport, &baud, &parity, &bits);
>
> -       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, RXTL_DEFAULT);
> +       imx_uart_setup_ufcr(sport, TXTL_DEFAULT, sport->rxtl);
>
>          retval = uart_set_options(&sport->port, co, baud, parity, bits, flow);
>
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