On 20/11/2022 09:21, Jisheng Zhang wrote: > I want to maintain this Bouffalolab riscv SoC entry from now on. Use 3rd person narrative, so: 1. Subject: MAINTAINERS: riscv: add entry for Bouffalolab SoC 2. Commit: Add Jisheng Zhang as Bouffalolab SoC maintainer. > > Signed-off-by: Jisheng Zhang <jszhang@xxxxxxxxxx> > --- > MAINTAINERS | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index 92451834b940..3564b27d7da4 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -17738,6 +17738,12 @@ F: arch/riscv/ > N: riscv > K: riscv > > +RISC-V BOUFFALOLAB SOC SUPPORT > +M: Jisheng Zhang <jszhang@xxxxxxxxxx> > +L: linux-riscv@xxxxxxxxxxxxxxxxxxx > +S: Maintained > +F: arch/riscv/boot/dts/bouffalolab/ > + > RISC-V MICROCHIP FPGA SUPPORT > M: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > M: Daire McNamara <daire.mcnamara@xxxxxxxxxxxxx> Best regards, Krzysztof
