From: Matthew Gerlach <matthew.gerlach@xxxxxxxxx> This patchset enhances the definition of the Device Feature Header (DFH) used by the Device Feature List (DFL) bus and then uses the new enhancements in a uart driver. Patch 1 updates the DFL documentation to provide the motivation behind the enhancements to the definition of the DFH. Patch 2 adds the definitions for DFHv1. Patch 3 adds basic support DFHv1. It provides a generic mechanism for describing MSIX interrupts used by a particular feature instance, and it gets the location and size of the feature's register set from DFHv1. Patch 4 adds a DFL uart driver that makes use of the new features of DFHv1. Basheer Ahmed Muddebihal (1): fpga: dfl: Add DFHv1 Register Definitions Matthew Gerlach (3): Documentation: fpga: dfl: Add documentation for DFHv1 fpga: dfl: add basic support DFHv1 tty: serial: 8250: add DFL bus driver for Altera 16550. Documentation/fpga/dfl.rst | 96 ++++++++++++ drivers/fpga/dfl.c | 234 +++++++++++++++++++++++------ drivers/fpga/dfl.h | 38 +++++ drivers/tty/serial/8250/8250_dfl.c | 149 ++++++++++++++++++ drivers/tty/serial/8250/Kconfig | 12 ++ drivers/tty/serial/8250/Makefile | 1 + include/linux/dfl.h | 15 ++ 7 files changed, 496 insertions(+), 49 deletions(-) create mode 100644 drivers/tty/serial/8250/8250_dfl.c -- 2.25.1
