On 2022-09-14 16:57, Greg Kroah-Hartman wrote:
On Wed, Sep 14, 2022 at 03:15:52PM +0100, Maciej W. Rozycki wrote:
On Wed, 14 Sep 2022, Maciej W. Rozycki wrote:
I'll examine your I/O conversation log in detail and will see if I can
come up with a possible explanation.
I think I know what is going on here. Can you please confirm that you
have the CONFIG_SERIAL_8250_16550A_VARIANTS option disabled (default to
"off" for x86 only)? That would explain things.
Offhand I am not sure what to do here. There are several options to
choose from I can think of right now:
1. Disable new OxSemi Tornado clock code iff !SERIAL_8250_16550A_VARIANTS,
bringing back buggy calculation for rates above 115200bps and coarse
BOTHER granularity.
2. Same as above, but additionally limit the baud rates to 115200bps to
avoid buggy rates.
Maybe this one? That feels odd that we do different things for this old
config option, that's not good. So making this "just work" should be
the best idea if at all possible.
3. Force SERIAL_8250_16550A_VARIANTS to "y" if SERIAL_8250_PCI != "n".
4. Remove SERIAL_8250_16550A_VARIANTS altogether and execute code it
guards unconditionally (does it still matter nowadays?).
5. Something else not yet determined.
We could force an EFR probe for this specific driver only.
Pros: driver behaves the same regardless of CONFIG_SERIAL_8250_16550A_VARIANTS
other chips/drivers will not get probed
Cons: autoconfig code will be somewhat bigger since code after the test will be reachable
change in unrelated part (8250_core.c) to propagate .probe flags
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index 82726cda6066..b9f28f95cfd5 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -1011,6 +1011,7 @@ int serial8250_register_8250_port(const struct uart_8250_port *up)
uart->rs485_start_tx = up->rs485_start_tx;
uart->rs485_stop_tx = up->rs485_stop_tx;
uart->dma = up->dma;
+ uart->probe = up->probe;
/* Take tx_loadsz from fifosize if it wasn't set separately */
if (uart->port.fifosize && !uart->tx_loadsz)
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index f6732c1ed238..b0b21e49ec6c 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -1242,6 +1242,7 @@ static int pci_oxsemi_tornado_setup(struct serial_private *priv,
up->port.get_divisor = pci_oxsemi_tornado_get_divisor;
up->port.set_divisor = pci_oxsemi_tornado_set_divisor;
up->port.set_mctrl = pci_oxsemi_tornado_set_mctrl;
+ up->probe |= UART_PROBE_EFR;
}
return pci_default_setup(priv, board, up, idx);
diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c
index 2b86c55ed374..b207d9982936 100644
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -1029,9 +1029,9 @@ static void autoconfig_16550a(struct uart_8250_port *up)
up->port.type = PORT_16550A;
up->capabilities |= UART_CAP_FIFO;
- if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS))
+ if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS) &&
+ !(up->probe & UART_PROBE_EFR))
return;
-
/*
* Check for presence of the EFR when DLAB is set.
* Only ST16C650V1 UARTs pass this test.
diff --git a/include/linux/serial_8250.h b/include/linux/serial_8250.h
index ff84a3ed10ea..0855316468e2 100644
--- a/include/linux/serial_8250.h
+++ b/include/linux/serial_8250.h
@@ -112,6 +112,7 @@ struct uart_8250_port {
unsigned char probe;
struct mctrl_gpios *gpios;
#define UART_PROBE_RSA (1 << 0)
+#define UART_PROBE_EFR (1 << 1)
/*
* Some bits in registers are cleared on a read, so they must
We can't just remove it, as for x86 the default is disabled due to this
only being relevant for very old hardware.
thanks,
greg k-h
--
Anders Blomdell Email: anders.blomdell@xxxxxxxxxxxxxx
Department of Automatic Control
Lund University Phone: +46 46 222 4625
P.O. Box 118
SE-221 00 Lund, Sweden
