On Tue, 13 Sep 2022, Sergiu Moga wrote:
> Make sure that the driver only divides the clock divisor if the
> IP handled at that point is USART, since UART IP's do not support
> implicit peripheral clock division. Instead, in the case of UART,
> go with the highest possible clock divisor.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@xxxxxxxxxxxxx>
> ---
>
>
> v1 -> v2:
> - Nothing, this patch was not here before and is mainly meant as both cleanup
> and as a way to introduce a new field into struct atmel_uart_port that will be
> used by the last patch to diferentiate between USART and UART regarding the
> location of the Baudrate Clock Source bitmask.
>
>
>
> v2 -> v3:
> - Use ATMEL_US_CD instead of 65535
> - Previously [PATCH 10]
> @@ -2283,10 +2287,21 @@ static void atmel_set_termios(struct uart_port *port,
> cd = uart_get_divisor(port, baud);
> }
>
> - if (cd > 65535) { /* BRGR is 16-bit, so switch to slower clock */
> + /*
> + * If the current value of the Clock Divisor surpasses the 16 bit
> + * ATMEL_US_CD mask and the IP is USART, switch to the Peripheral
> + * Clock implicitly divided by 8.
> + * If the IP is UART however, keep the highest possible value for
> + * the CD and avoid needless division of CD, since UART IP's do not
> + * support implicit division of the Peripheral Clock.
> + */
> + if (atmel_port->is_usart && cd > ATMEL_US_CD) {
> cd /= 8;
> mode |= ATMEL_US_USCLKS_MCK_DIV8;
> + } else {
> + cd &= ATMEL_US_CD;
Now that I read the above comment with more thought, would:
cd = min(cd, ATMEL_US_CD);
be more appropriate here if "the highest possible value" is sought for?
--
i.
