This patch enables support for SW half-duplex mode using em485. Cc: Eric Tremblay <etremblay@xxxxxxxxxxxxxxxxxxxx> Cc: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> Tested-by: Vicente Bergas <vicencb@xxxxxxxxx> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@xxxxxxxxxxxxxxx> --- drivers/tty/serial/8250/8250_dwlib.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/tty/serial/8250/8250_dwlib.c b/drivers/tty/serial/8250/8250_dwlib.c index 05b73c8e75bc..fbabfdd8c7b8 100644 --- a/drivers/tty/serial/8250/8250_dwlib.c +++ b/drivers/tty/serial/8250/8250_dwlib.c @@ -157,8 +157,14 @@ void dw8250_setup_port(struct uart_port *p) u32 reg; pd->hw_rs485_support = dw8250_detect_rs485_hw(p); - if (pd->hw_rs485_support) + if (pd->hw_rs485_support) { p->rs485_config = dw8250_rs485_config; + } else { + p->rs485_config = serial8250_em485_config; + up->rs485_start_tx = serial8250_em485_start_tx; + up->rs485_stop_tx = serial8250_em485_stop_tx; + } + up->capabilities |= UART_CAP_NOTEMT; /* * If the Component Version Register returns zero, we know that @@ -194,7 +200,7 @@ void dw8250_setup_port(struct uart_port *p) p->type = PORT_16550A; p->flags |= UPF_FIXED_TYPE; p->fifosize = DW_UART_CPR_FIFO_SIZE(reg); - up->capabilities = UART_CAP_FIFO; + up->capabilities = UART_CAP_FIFO | UART_CAP_NOTEMT; } if (reg & DW_UART_CPR_AFCE_MODE) -- 2.30.2