On 07/04/2022 10:13, Yu Tu wrote:
Due to chip process differences, chip designers recommend using baud
rates as close to and larger as possible in order to reduce clock
errors.
Signed-off-by: Yu Tu <yu.tu@xxxxxxxxxxx>
---
drivers/tty/serial/meson_uart.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/meson_uart.c b/drivers/tty/serial/meson_uart.c
index 2bf1c57e0981..8e59624935af 100644
--- a/drivers/tty/serial/meson_uart.c
+++ b/drivers/tty/serial/meson_uart.c
@@ -299,10 +299,10 @@ static void meson_uart_change_speed(struct uart_port *port, unsigned long baud)
cpu_relax();
if (port->uartclk == 24000000) {
- val = ((port->uartclk / 3) / baud) - 1;
+ val = DIV_ROUND_CLOSEST(port->uartclk / 3, baud) - 1;
val |= AML_UART_BAUD_XTAL;
} else {
- val = ((port->uartclk * 10 / (baud * 4) + 5) / 10) - 1;
+ val = DIV_ROUND_CLOSEST(port->uartclk / 4, baud) - 1;
}
val |= AML_UART_BAUD_USE;
writel(val, port->membase + AML_UART_REG5);
I check the calculations, and with DIV_ROUND_CLOSEST(), result is always
closer to the required baudrate.
Reviewed-by: Neil Armstrong <narmstrong@xxxxxxxxxxxx>
