Hi,
Le 25/02/2022 à 08:39, Yu Tu a écrit :
Using the common Clock code to describe the UART baud rate
clock makes it easier for the UART driver to be compatible
with the baud rate requirements of the UART IP on different
meson chips. Add Meson S4 SoC compatible.
The test method:
Start the console and run the following commands in turn:
stty -F /dev/ttyAML0 115200 and stty -F /dev/ttyAML0 921600.
Since most SoCs are too old, I was able to find all the platforms myself
such as Meson6, Meson8, Meson8b, GXL and so on. I only tested it with
G12A and S4.
Yu Tu (6):
tty: serial: meson: Move request the register region to probe
tty: serial: meson: Use devm_ioremap_resource to get register mapped
memory
tty: serial: meson: Describes the calculation of the UART baud rate
clock using a clock frame
tty: serial: meson: Make some bit of the REG5 register writable
tty: serial: meson: The system stuck when you run the stty command on
the console to change the baud rate
tty: serial: meson: Added S4 SOC compatibility
V6 -> V7: To solve the system stuck when you run the stty command on
the console to change the baud rate.
V5 -> V6: Change error format as discussed in the email.
V4 -> V5: Change error format.
V3 -> V4: Change CCF to describe the UART baud rate clock as discussed
in the email.
V2 -> V3: add compatible = "amlogic,meson-gx-uart". Because it must change
the DTS before it can be deleted
V1 -> V2: Use CCF to describe the UART baud rate clock.Make some changes as
discussed in the email
Link:https://lore.kernel.org/linux-amlogic/20220118030911.12815-4-yu.tu@xxxxxxxxxxx/
drivers/tty/serial/meson_uart.c | 221 ++++++++++++++++++++++----------
1 file changed, 154 insertions(+), 67 deletions(-)
base-commit: a603ca60cebff8589882427a67f870ed946b3fc8
Could you send the emails To Kevin, Jerome, Martin & me, and put the various lists in CC instead ? otherwise we are not notified when the patch is accepted by the tty maintainer.
Thanks,
Neil
