Triggering RX interrupt for every byte defeats the purpose of aging timer and leads to interrupt storm at high baud rates. The interrupt storm can starve line discipline worker and prevent tty throttling, rendering hardware/software flow control useless. Increase receiver trigger level to 8 to increase the minimum period between RX interrupts to 8 characters time. The tradeoff is increased latency. Aging timer resets with every received character. Worst case scenario happens when RX data intercharacter delay is slightly less than the aging timer timeout (8 characters time). The upper bound of the time a character can wait in RxFIFO before being read is: (RXTL - 1) * (8 character time timeout + received 1 character time) Usually the data is received in frames, with low intercharacter delay. In such case the latency increase is 8 characters time at the end of the frame with probability (RXTL - 1) / RXTL. Signed-off-by: Tomasz Moń <tomasz.mon@xxxxxxxxxxxxxxx> Acked-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> --- changes in v2: - reworded commit message based on review comments - added Acked-by by Uwe tag from V1 review v1: https://lore.kernel.org/linux-serial/20220104103203.2033673-1-tomasz.mon@xxxxxxxxxxxxxxx/ --- drivers/tty/serial/imx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 90f82e6c54e4..3c812c47ecc0 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1255,7 +1255,7 @@ static void imx_uart_clear_rx_errors(struct imx_port *sport) } #define TXTL_DEFAULT 2 /* reset default */ -#define RXTL_DEFAULT 1 /* reset default */ +#define RXTL_DEFAULT 8 /* 8 characters or aging timer */ #define TXTL_DMA 8 /* DMA burst setting */ #define RXTL_DMA 9 /* DMA burst setting */ -- 2.25.1
