On Mon, Nov 01, 2021 at 03:48:22PM +0800, hammer.hsieh wrote: > Add bindings doc for Sunplus SoC UART Driver > > Signed-off-by: hammer.hsieh <hammer.hsieh@xxxxxxxxxxx> > --- > .../devicetree/bindings/serial/sunplus,uart.yaml | 116 +++++++++++++++++++++ > MAINTAINERS | 5 + > 2 files changed, 121 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/sunplus,uart.yaml > > diff --git a/Documentation/devicetree/bindings/serial/sunplus,uart.yaml b/Documentation/devicetree/bindings/serial/sunplus,uart.yaml > new file mode 100644 > index 0000000..f2ca9ee > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/sunplus,uart.yaml > @@ -0,0 +1,116 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +# Copyright (C) Sunplus Co., Ltd. 2021 > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/serial/sunplus,uart.yaml#"; > +$schema: "http://devicetree.org/meta-schemas/core.yaml#"; > + > +title: Sunplus SoC UART Controller Device Tree Bindings > + > +maintainers: > + - Tony Huang <tony.huang@xxxxxxxxxxx> > + - Hammer Hsieh <hammer.hsieh@xxxxxxxxxxx> > + - Wells Lu <wells.lu@xxxxxxxxxxx> > + > +allOf: > + - $ref: serial.yaml# > + > +properties: > + compatible: > + const: sunplus,sp7021-uart > + > + reg: > + minItems: 1 > + maxItems: 2 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + minItems: 1 > + maxItems: 2 > + > + clock-names: > + oneOf: > + - items: > + - const: UADMA > + - const: PERI0 > + - items: > + - const: UADMA > + - const: PERI1 These 2 can be: items: - const UADMA - pattern: '^PERI[0-1]$' But why the difference for only one model of UART? The names should reflect the function of the clock. > + - items: > + - const: HWUA > + - const: PERI0 > + - items: > + - const: HWUA > + - const: PERI1 > + > + resets: > + maxItems: 1 > + > + which-uart: > + $ref: /schemas/types.yaml#/definitions/uint32 > + enum: [ 1, 2, 3, 4] What's this for? Looks like an index and we don't do indices in DT. There is 'aliases' though. > + > +required: > + - compatible > + - reg > + - clocks > + - resets > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/clock/sp-sp7021.h> > + #include <dt-bindings/reset/sp-sp7021.h> > + aliases { > + serial0 = &uart0; > + serial1 = &uart1; > + serial10 = &uartdmarx0; > + serial20 = &uartdmatx0; > + }; > + > + uart0: serial@9c000900 { > + compatible = "sunplus,sp7021-uart"; > + reg = <0x9c000900 0x80>; > + interrupt-parent = <&intc>; > + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clkc UA0>; The schema says you must have 2 clocks. > + resets = <&rstc RST_UA0>; > + }; > + > + // UART1 PIO mode > + uart1: serial@9c000980 { > + compatible = "sunplus,sp7021-uart"; > + reg = <0x9c000980 0x80>; > + interrupt-parent = <&intc>; > + interrupts = <54 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clkc UA1>; > + resets = <&rstc RST_UA1>; > + }; > + > + // UART1 DMA mode for RX > + uartdmarx0: serial@9c008980 { > + compatible = "sunplus,sp7021-uart"; > + reg = <0x9c008980 0x40>; > + interrupt-parent = <&intc>; > + interrupts = <138 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clkc UADMA>, <&clkc PERI0>; > + clock-names = "UADMA", "PERI0"; > + resets = <&rstc RST_UADMA>; > + which-uart = <1>; > + }; > + > + // UART1 DMA mode for TX > + uartdmatx0: serial@9c008a00 { > + compatible = "sunplus,sp7021-uart"; > + reg = <0x9c008a00 0x40>, <0x9c008880 0x80>; > + clocks = <&clkc HWUA>, <&clkc PERI0>; > + clock-names = "HWUA", "PERI0"; > + resets = <&rstc RST_HWUA>; > + which-uart = <1>; > + }; > + > +... > diff --git a/MAINTAINERS b/MAINTAINERS > index 3b79fd4..f863e97 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -17945,6 +17945,11 @@ L: netdev@xxxxxxxxxxxxxxx > S: Maintained > F: drivers/net/ethernet/dlink/sundance.c > > +SUNPLUS UART DRIVER > +M: Hammer Hsieh <hammer.hsieh@xxxxxxxxxxx> > +S: Maintained > +F: Documentation/devicetree/bindings/serial/sunplus,uart.yaml > + > SUPERH > M: Yoshinori Sato <ysato@xxxxxxxxxxxxxxxxxxxx> > M: Rich Felker <dalias@xxxxxxxx> > -- > 2.7.4 > >
