On Tue, Jul 27, 2021 at 06:17:37PM -0400, Sean Anderson wrote:
> This converts the existing documentation for the uartlite binding to
> json-schema.
>
> Signed-off-by: Sean Anderson <sean.anderson@xxxxxxxx>
> ---
>
> (no changes since v1)
>
> .../bindings/serial/xlnx,opb-uartlite.txt | 23 --------
> .../bindings/serial/xlnx,opb-uartlite.yaml | 53 +++++++++++++++++++
> 2 files changed, 53 insertions(+), 23 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> create mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml
>
> diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> deleted file mode 100644
> index c37deb44dead..000000000000
> --- a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> +++ /dev/null
> @@ -1,23 +0,0 @@
> -Xilinx Axi Uartlite controller Device Tree Bindings
> ----------------------------------------------------------
> -
> -Required properties:
> -- compatible : Can be either of
> - "xlnx,xps-uartlite-1.00.a"
> - "xlnx,opb-uartlite-1.00.b"
> -- reg : Physical base address and size of the Axi Uartlite
> - registers map.
> -- interrupts : Should contain the UART controller interrupt.
> -
> -Optional properties:
> -- port-number : Set Uart port number
> -- clock-names : Should be "s_axi_aclk"
> -- clocks : Input clock specifier. Refer to common clock bindings.
> -
> -Example:
> -serial@800c0000 {
> - compatible = "xlnx,xps-uartlite-1.00.a";
> - reg = <0x0 0x800c0000 0x10000>;
> - interrupts = <0x0 0x6e 0x1>;
> - port-number = <0>;
> -};
> diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml
> new file mode 100644
> index 000000000000..4ef29784ae97
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/serial/xlnx,opb-uartlite.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Xilinx Axi Uartlite
> +
> +maintainers:
> + - Peter Korsgaard <jacmet@xxxxxxxxxx>
> +
> +properties:
> + compatible:
> + contains:
> + enum:
> + - xlnx,xps-uartlite-1.00.a
> + - xlnx,opb-uartlite-1.00.b
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + port-number:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: Set Uart port number
> +
> + clocks:
> + maxItems: 1
> +
> + clock-names:
> + const: s_axi_aclk
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> +
> +allOf:
> + - $ref: /schemas/serial.yaml#
> +
> +additionalProperties: true
unevaluatedProperties: false
With that,
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
> +
> +examples:
> + - |
> + serial@800c0000 {
> + compatible = "xlnx,xps-uartlite-1.00.a";
> + reg = <0x800c0000 0x10000>;
> + interrupts = <0x0 0x6e 0x1>;
> + port-number = <0>;
> + };
> +...
> --
> 2.25.1
>
>
