Dennis reported that on ACPI-based systems the clock frequency
isn't enough to configure device properly. We have to respect
the clock source as well. To achieve this match the clock-names
property against "xtal" to recognize crystal connection.
Reported-by: Dennis Giaya <dgiaya@xxxxxxxx>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
drivers/tty/serial/max310x.c | 15 +++++----------
1 file changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index ef11860cd69e..e2ab8d4eb7ad 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -1271,18 +1271,13 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
/* Always ask for fixed clock rate from a property. */
device_property_read_u32(dev, "clock-frequency", &uartclk);
- s->clk = devm_clk_get_optional(dev, "osc");
+ xtal = device_property_match_string(dev, "clock-names", "xtal") >= 0;
+ if (xtal)
+ s->clk = devm_clk_get_optional(dev, "xtal");
+ else
+ s->clk = devm_clk_get_optional(dev, "osc");
if (IS_ERR(s->clk))
return PTR_ERR(s->clk);
- if (s->clk) {
- xtal = false;
- } else {
- s->clk = devm_clk_get_optional(dev, "xtal");
- if (IS_ERR(s->clk))
- return PTR_ERR(s->clk);
-
- xtal = true;
- }
ret = clk_prepare_enable(s->clk);
if (ret)
--
2.30.2
